1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to the field of monitoring a data processor to detect if it is operating as anticipated.
2. Description of the Prior Art
In data processing systems, errors may occur that cause the system to stop executing correctly. A known way of detecting such errors and resetting the system is by the use of a watchdog. A watchdog is generally a piece of hardware that is built into a microcontroller and can cause a processor to reset if it judges that it has hung for some reason. It works by having a timer, which is set by software to a predetermined value and counts down to zero. This timer is reset to the predetermined value in response to signals received from the processor, thus the processor is designed to send signals to the watchdog periodically during normal operation. If for some reason the processor hangs, then it no longer sends the signals and thus, once the predetermined time has elapsed the watchdog will reset the processor.
A drawback of this system is that a watchdog will only catch a subset of possible operating system crashes as the system may not be executing correctly but may still be sending the signals to the watchdog.
Further error detecting systems are known in which, for example, if a data access is performed outside of a certain memory range then some kind of restore of the system may be activated.
Debug systems are also known, these are not applicable to monitoring real time processing but are used during development of a system to determine where the system is failing. A debug system can be set to watch a particular memory address, which is suspected to be the address where the system is failing. Thus, in response to a data access to this memory address, debug state can be activated to analyse the state of the processor at this particular point.